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27-Line SCSI Terminator
-Plug and Play
IMP5 21 1
DESCRIPTION The IMP5121 Plug and Play terminator represents next-generation technology for SCSI termination applications. The low-voltage BiCMOS architecture employed in its design offers performance superior to older passive and active techniques. IMP's architecture employs high-speed adaptive elements for each channel, providing the fastest response possible. The channel bandwidth is typically 35MHz. The IMP5121 compares favorably to older linear regulator approaches whose bandwidth's are dominated by the output compensation capacitor and are limited to the 500KHz bandwidth region (see further discussion in the Functional Description section). IMP's architecture also eliminates the output compensation capacitor required in earlier terminator designs. Each is approved for use with SCSI-1, -2, -3, ULTRA and beyond -- providing the highest performance alternative available today. Another key improvement of the IMP5121 products lies in their ability to insure reliable, error free communications even in systems which do not necessarily adhere to recommended SCSI hardware design guidelines, such as the use of improper cable lengths and impedances. Frequently, this situation is not controlled by the peripheral or host designer and, when problems occur, they are the first to be made aware of these problems. The IMP5121 architecture is much more tolerant of marginal system integrations. Recognizing the needs of portable and configurable peripherals, the IMP5121 has a TTL compatible sleep/disable mode. Quiescent current is typically less than 375A in this mode, while the output capacitance is less than 3pF. Reduced component count is also inherent in the IMP5121 architecture. Traditional termination techniques require large stabilization and transient protection capacitors of up to 20F in value and size. The IMP5121 architecture does not require these components, allowing all the cost savings associated with inventory, board space, assembly, reliability, and component costs. The IMP5121 has multiple disables for full Plug and Play SCSI capability for Host Bus Adapters with 3 SCSI connectors. It also splits the upper 9 termination lines for mixing 16-bit (wide) and 8-bit (narrow) buses with minimal board trace capacitance. PRODUCT HIGHLIGHT
KEY FEATURES
s ULTRA-FAST RESPONSE FOR FAST-20 SCSI APPLICATIONS s PLUG AND PLAY SCSI FOR HOST BUS ADAPTERS WITH 3 SCSI CONNECTORS s SPLIT DISCONNECT FOR MIXING 16-BIT (WIDE) OR 8-BIT (NARROW) BUSES s 35MHz CHANNEL BANDWIDTH s 3.3V OPERATION s LESS THAN 3pF (TYP.) OUTPUT CAPACITANCE s SLEEP-MODE CURRENT LESS THAN 375A s HOT-SWAP COMPATIBLE s NO EXTERNAL COMPENSATION CAPACITORS s COMPATIBLE WITH ACTIVE NEGATION DRIVERS (60mA / CHANNEL) s SUPERIOR REPLACEMENT FOR THE UCC5621
RE C E I V I N G WAV E F O R M - 20MH Z
D R I V I N G WAV E F O R M - 20MH Z
Receiver 1 Meter, AWG 28 IMP 5121 LX5268
Driver IMP 5121 LX5268
PACKAGE ORDER INFO TJ (C) 0 to 125
PW Plastic TSSOP 56-pin
IMP5121CPW
DB Plastic SSOP 44-pin
IMP5121CDB
Note: Available in Tape & Reel. Append the letter "T" to part number. (i.e. IMP5121CDBT)
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ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE PIN OUTS
T19 T20 T1 T2 W1 W2 T3 T4 T5 GND GND HEATSINK HEATSINK HEATSINK HEATSINK HEATSINK HEATSINK GND GND DISC1 DISC2 T6 T7 T8 T9 T10 T21 T22
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
TermPwr Voltage ........................................................................................................... 7V Continuous Output Voltage Range ...................................................................... 0 to 5.5V Continuous Disable Voltage Range ...................................................................... 0 to 5.5V Operating Junction Temperature Plastic (PW & DB Packages) ................................................................................ 150C Storage Temperature Range ...................................................................... -65C to +150C Solder Temperature (Soldering, 10 seconds) .............................................................. 300C
Note 1. Exceeding these ratings could cause damage to the device.
THERMAL DATA
PW PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA ........................................... 50C/W
DB PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA ........................................... 50C/W
Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow.
T27 T26 T25 T18 N1 T17 T16 T15 N.C. GND GND HEATSINK HEATSINK HEATSINK HEATSINK HEATSINK HEATSINK GND GND VT T14 T13 T12 N.C. N.C. T11 T24 T23
PW PACKAGE (Top View)
T19 T20 T1 T2 W1 W2 T3 T4 T5 GND GND GND GND DISC1 DISC2 T6 T7 T8 T9 T10 T21 T22
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
T27 T26 T25 T18 N1 T17 T16 T15 N.C. GND GND GND GND VT T14 T13 T12 N.C. N.C. T11 T24 T23
DB PACKAGE (Top View)
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RECOMMENDED OPERATING CONDITIONS (Note 2) Parameter
Termination Voltage High Level Disable Input Voltage Low Level Disable Input Voltage Operating Virtual Junction Temperature Range IMP5121C Note 2. Range over which the device is functional.
Symbol
VTERM VIH VIL
Recommended Operating Conditions Min. Typ. Max.
3.0 2 0 0 5.5 VTERM 0.8 125
Units
V V V C
ELECTRICAL CHARACTERISTICS
Term Power = 4.75V unless otherwise specified. Unless otherwise specified, these specifications apply at the recommended operating ambient temperature of TA = 25C. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.
Parameter
Output High Voltage TermPwr Supply Current
Symbol
VOUT ICC
Test Conditions
All data lines = open All data lines = 0.5V Disable Pins 1, 2, W1, W2 & N1 < 0.8V VOUT = 0.5V DISC1 = 0V DISC1 = 4.75V DISC2 = 0V DISC2 = 4.75V DISC1 and DISC2= < 0.8V, VO = 0.5V VOUT = 0V, frequency = 1MHz VOUT = 4V
Min.
2.65
IMP5121 Typ. Max.
2.85 12 635 375 -23 -20 10 -20 10 10 3 35 60 18 670 -24
Units
V mA mA A mA A nA A nA nA pF MHz mA
Output Current Disable Input Current
DISC1 DISC2
IOUT IIN
-21
Output Leakage Current Capacitance in Disabled Mode Channel Bandwidth Termination Sink Current, per Channel
COUT BW ISINK
FUNCTIONAL DESCRIPTION Cable transmission theory suggests that in order to optimize signal is 12mA and the device will respond to line demands by delivering speed and quality, the termination should act both as an ideal 24mA on assertion and by imposing 2.85V on de-assertion. voltage reference when the line is released (de-asserted) and as an Disable mode places the device in a sleep state, where a meager ideal current source when the line is active (asserted). Common 375A of quiescent current is consumed. Additionally, all outputs active terminators, which are in a Hi-Z (impedPOWER UP / POWER DOWN FUNCTION TABLE consist of Linear ance) state. Sleep mode Regulators in series with can be used for power DISC1 DISC2 W1 W2 N1 T1-T18 T19-T27 resistors (typically conservation or to 110), are a comprocompletely eliminate the H L DC DC DC Enabled Disabled mise. As the line terminator from the L H DC DC DC Disabled Enabled voltage increases, the SCSI chain. In the L L DC DC DC Disabled Disabled amount of current second case, termination H H H H H Enabled Enabled decreases linearly by the node capacitance is H H H H L Enabled Enabled equation V = I * R. important to consider. The IMP5121, with its The terminator will H H H L H Enabled Enabled unique new architecture, appear as a parasitic H H H L L Disabled Enabled applies the maximum distributed capacitance H H L H H Enabled Enabled amount of current on the line, which can H H L H L Disabled Enabled regardless of line voltage detract from bus H H L L H Disabled Disabled until the termination performance. For this high threshold (2.85V) reason, the IMP5121 has H H L L L Disabled Disabled is reached. been optimized to have Acting as a near ideal line terminator, the IMP5121 closely only 4pF of capacitance per output in the sleep state. reproduces the optimum case when the device is enabled. To An additional feature of the IMP5121 is its compatibility with enable the device the DISC1 and DISC2 pins must be driven per active negation drivers. The device handles up to 60mA of sink the above table. During this mode of operation, quiescent current current for drivers which exceed the 2.85V output high.
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BLOCK DIAGRAM
TERM POWER
THERMAL LIMITING CIRCUIT
CURRENT BIASING CIRCUIT
24mA CURRENT LIMITING CIRCUIT
DATA OUTPUT PIN DB(0)
VTERM DISC1 ENABLE LOGIC DISC2 VTERM 2.85V
1.4V 1 OF 27 CHANNELS
PLUG AND PLAY DIAGRAM
The Plug and Play SCSI auto-termination disabling, connect pin 50 of the External Wide SCSI connector to W1 of the IMP5121, connect pin 50 of the Internal Wide SCSI connector to W2 of the IMP5121, and connect pin 22 of the Internal Narrow connector to N1 of the IMP5121.
Internal Narrow
Internal Wide External Wide IMP5121
IMP, Inc. Corporate Headquarters 2830 N. First Street San Jose, CA 95134 Tel: 408.432.9100 Main Tel: 800.438.3722 Fax: 408.434.0335 Fax-on-Demand: 800.249.1614 (USA) Fax-on-Demand: 303.575.6156 (International) e-mail: info@impinc.com http://www.impweb.com
The IMP logo is a registered trademark of IMP, Inc. All other company and product names are trademarks of their respective owners.
(c) 1998 IMP, Inc. Printed in USA Part No.: IMP5121 Document Number: IMP5121-03-4/98
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